More about patenting implementations of AI - is specific hardware needed? 

More about patenting implementations of AI - is specific hardware needed? 

In a recent note (here), I looked at how the EPO applies (or should apply) the “technical implementation” route to the all-important technical character that can lead to the patentability of AI inventions at the EPO. This raises one crucial question whether specific hardware needs to be recited to acknowledge the contribution to a technical effect. My previous article argued that it doesn't, based on the decisions the Guidelines cite. A further Board of Appeal decision, T2330/13, also supports this view. Even better, this decision is already mentioned in the EPO Guidelines on AI patenting for a different point. 

The application under appeal relates to a system for checking selection conditions for components of a configurable product, for example, assembling a car model from a catalogue of parts according to a design specification. The method uses a matrix of bits to capture all combinations of characteristics of the product and applies bit strings representing selection and restriction conditions. Logical operations are applied to the bit strings to analyse the set of conditions. The claims before the Board of Appeal further contained the feature that the matrix is split into sub-matrices which are processed in parallel. The description of the invention mentions that the bit string implementation is significantly faster than prior-art methods and that the sub-matrices can be processed in parallel to save time. At first instance, the examining division refused the application without reference to any specific prior art because the claims were no more than a mathematical method implemented on a computer, that the mathematical method aspects were not relevant for the assessment of inventive step, and because computers are well-known, the claims lacked an inventive step. 

The Board found that the bit matrix/string implementation that was claimed, combined with parallel processing, contributed to the technical character of the invention and had to be taken into account in examining the question of inventive step. The Board, therefore, remitted the case back to the first instance for examination of inventive step based on relevant prior art. 

This specific finding of the bit matrix/string implementation combined with parallel processing being a technical implementation (which was denied at first instance) is in itself interesting for anyone looking to get a claim relating to a technical implementation of AI through the EPO. However, the case contains some even better nuggets. Specifically, in points 5.7.5 to 5.7.10 of the reasons for the decision, the Board:

  • Confirmed that computational efficiency achieved by features resulting from technical considerations, for example about the internal functioning of a computer, is in principle a technical effect

  • Noted that several decisions have affirmed the technical character of particular data structures

  • Noted that binary or bit maps have sometimes been held to be technical by the Boards of Appeal

  • Held that specifying the representation of non-technical features by specific bit matrices and bit strings that are processed in a specific manner in order to arrive at the desired result are determined by technical considerations and hence contribute to a technical effect, even if the claim does not define all details of the necessary operations and bit strings and matrices correspond to Boolean mathematical constructs

  • Found that this is mainly the case because the specific choice of bit strings and matrices is determined by technical considerations about efficiently performing the method steps in parallel: applying T1321/11 concerning parallel rather than serial organisation of two processes; distinguishing T1784/06 on the basis that the claims and the originally filed description describe parallel processing

  • Held that features supporting parallel processing contribute to the technical character of the claim and that a more concrete, parallel hardware architecture need not be claimed –  it was credible that efficiency gains can be achieved for different technical means used to perform sub-tasks in parallel.

The case opens the door to an even wider interpretation of what can contribute to a technical character. Specifically, the Board questioned the reasoning of the first instance decision that matrices, bit strings, and, logical operations did not imply any computer architecture, and that they therefore did not contribute to the technical character of the invention without reciting any particular architecture . See points 5.7.3 and 5.7.4 of the reasons for the decision. This is an indication that this Board, more generally, did not share the view that a particular hardware architecture had to be recited necessarily to allow the mathematical features to contribute to a technical effect.

A key takeaway from this decision is that computational efficiencies achieved by features resulting from technical considerations, such as the internal functioning of computers, can in principle contribute to a technical effect and that, at least in the case of features facilitating parallel processing, specific hardware need not be recited. Based on the comments by the Board on the claims subject to the first instance decision, it stands to reason that a recitation of specific hardware should not be required as long as the (mathematical) features in question result from technical considerations.  

Read previous article | Read next article

Follow Alexander Korenberg’s AI musings

AI musings